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Proceedings Paper

Optical DC overlay measurement in the 2nd level process of 65 nm alternating phase shift mask
Author(s): Jian Ma; Ke Han; Kyung Lee; Yulia Korobko; Mary Silva; Joas Chavez; Brian Irvine; Sven Henrichs; Kishore Chakravorty; Robert Olshausen; Mahesh Chandramouli; Bobby Mammen; Ramaswamy Padmanaban
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Paper Abstract

Alternating phase shift mask (APSM) techniques help bridge the significant gap between the lithography wavelength and the patterning of minimum features, specifically, the poly line of 35 nm gate length (1x) in Intel's 65 nm technology. One of key steps in making APSM mask is to pattern to within the design tolerances the 2nd level resist so that the zero-phase apertures will be protected by the resist and the pi-phase apertures will be wide open for quartz etch. The ability to align the 2nd level to the 1st level binary pattern, i.e. the 2nd level overlay capability is very important, so is the capability of measuring the overlay accurately. Poor overlay could cause so-called the encroachment after quartz etch, producing undesired quartz bumps in the pi-apertures or quartz pits in the zero-apertures. In this paper, a simple, low-cost optical setup for the 2nd level DC (develop check) overlay measurements in the high volume manufacturing (HVM) of APSM masks is presented. By removing systematic errors in overlay associated with TIS and MIS (tool-induced shift and Mask-process induced shift), it is shown that this setup is capable of supporting the measurement of DC overlay with a tolerance as small as +/- 25 nm. The outstanding issues, such as DC overlay error component analysis, DC - FC (final check) overlay correlation and the overlay linearity (periphery vs. indie), are discussed.

Paper Details

Date Published: 5 November 2005
PDF: 10 pages
Proc. SPIE 5992, 25th Annual BACUS Symposium on Photomask Technology, 59921P (5 November 2005); doi: 10.1117/12.632160
Show Author Affiliations
Jian Ma, Intel Corp. (United States)
Ke Han, Intel Corp. (United States)
Kyung Lee, Intel Corp. (United States)
Yulia Korobko, Intel Corp. (United States)
Mary Silva, Intel Corp. (United States)
Joas Chavez, Intel Corp. (United States)
Brian Irvine, Intel Corp. (United States)
Sven Henrichs, Intel Corp. (United States)
Kishore Chakravorty, Intel Corp. (United States)
Robert Olshausen, Intel Corp. (United States)
Mahesh Chandramouli, Intel Corp. (United States)
Bobby Mammen, Intel Corp. (United States)
Ramaswamy Padmanaban, Intel Corp. (United States)


Published in SPIE Proceedings Vol. 5992:
25th Annual BACUS Symposium on Photomask Technology
J. Tracy Weed; Patrick M. Martin, Editor(s)

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