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Proceedings Paper

Self-assembled porous silica/Cu damascene interconnects for 45nm node and beyond
Author(s): T. Kikkawa; R. Yagi; S. Chikaki; M. Shimoyama; T. Ono; N. Fujii; K. Kohmura; H. Tanaka; T. Nakayama; A. Ishikawa; H. Matsuo; Y. Sonoda; N. Hata; Y. Seino; T. Yoshino; K. Kinoshita
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Paper Abstract

A novel scalable low dielectric constant (low-k) film technology was developed by use of self-assembled porous silica. Non-periodic disordered porous silica film structure was formed on a Si wafer by spin-coating a precursor solution with micelles of surfactant and a silica oligomer. Polyoxyethylene-polyoxypropylene-polyoxyethylene (EOPOEO) triblock copolymers and tetraethyl orthosilicate (TEOS) were used as a surfactant and a silica oligomer, respectively. A novel tetramethylcyclotetrasiloxyane (TMCTS) vapor treatment process was developed to reinforce mechanical properties of the porous silica film and to recover process-induced damages. New copper (Cu) electroplating solution and post cleaning process of chemical mechanical polishing (CMP) were developed to improve leakage current characteristics and dielectric constant of the porous silica low-k film. Cu/porous silica low-k damascene structures were fabricated and their characteristics were investigated.

Paper Details

Date Published: 16 November 2005
PDF: 9 pages
Proc. SPIE 6002, Nanofabrication: Technologies, Devices, and Applications II, 60020M (16 November 2005); doi: 10.1117/12.632119
Show Author Affiliations
T. Kikkawa, Hiroshima Univ. (Japan)
National Institute of Advanced Industrial Science and Technology (Japan)
R. Yagi, National Institute of Advanced Industrial Science and Technology (Japan)
S. Chikaki, National Institute of Advanced Industrial Science and Technology (Japan)
M. Shimoyama, National Institute of Advanced Industrial Science and Technology (Japan)
T. Ono, National Institute of Advanced Industrial Science and Technology (Japan)
N. Fujii, National Institute of Advanced Industrial Science and Technology (Japan)
K. Kohmura, National Institute of Advanced Industrial Science and Technology (Japan)
H. Tanaka, National Institute of Advanced Industrial Science and Technology (Japan)
T. Nakayama, National Institute of Advanced Industrial Science and Technology (Japan)
A. Ishikawa, National Institute of Advanced Industrial Science and Technology (Japan)
H. Matsuo, National Institute of Advanced Industrial Science and Technology (Japan)
Y. Sonoda, National Institute of Advanced Industrial Science and Technology (Japan)
N. Hata, National Institute of Advanced Industrial Science and Technology (Japan)
Y. Seino, National Institute of Advanced Industrial Science and Technology (Japan)
T. Yoshino, National Institute of Advanced Industrial Science and Technology (Japan)
K. Kinoshita, National Institute of Advanced Industrial Science and Technology (Japan)


Published in SPIE Proceedings Vol. 6002:
Nanofabrication: Technologies, Devices, and Applications II
Warren Y.-C. Lai; Leonidas E. Ocola; Stanley Pau, Editor(s)

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