Contact and via layers are becoming more critical than before from lithography point of view due to the fact that the contact and via sizes for advanced devices are falling into deep sub-wavelength ranges. In this study, we will demonstrate several different methodologies for contact and via CD variation check and contact/metal overlay checks on the post-opc data using a model based verification software platform. Our study reveals that the full chip verification for the contact and via layers is necessary achievable to guarantee the mask data quality and to prevent catastrophic pattern errors resulting from improper OPC corrections. Good scalability of the software methodology and platform makes it possible to do the full chip verification with reasonable turn around time.

Date Published: 28 June 2005
PDF: 10 pages
Proc. SPIE 5853, Photomask and Next-Generation Lithography Mask Technology XII, (28 June 2005); doi: 10.1117/12.617139

Published in SPIE Proceedings Vol. 5853:
Photomask and Next-Generation Lithography Mask Technology XII
Masanori Komuro, Editor(s)