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Proceedings Paper

Requirements for mask technology from the view point of SOC and FLASH memory trends (Invited Paper)
Author(s): Akira Imai; Noboyuki Yoshioka; Tetsuro Hanawa; Koichiro Narimatsu; Kunihiro Hosono; Kazuyuki Suko
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Paper Abstract

Semiconductor devices are making important role in our life. Many semiconductor chips will be used to every thing, and we will receive the various services anywhere anytime through a digital network. There are so many applications using semiconductor products that support such a ubiquitous era, and it is expected that mobile, automobile and PC/AV applications will have the great growth from now on. In this paper, we describe the lithography technology trend and requirements for mask technology from the view point of SOC and FLASH memory trend. From the device development trend, it is expected that FLASH memory become driving force of lithography technology. To realize hp45nm node and beyond, the installation of hyper-NA ArF-immersion tools with low-k1 technique is the key issue. With this, DFM (Design For Manufacturability) is the key technology and a continuous approach of systematic DFM technique is important in order to reduce chip cost. Also, Mask DFM is needed to realize cost-effective low-k1 process and it drives reasonable mask cost and TAT. In order to reduce mask cost in device development and small volume production, we expect greatly that maskless lithography (ML2) become a leading tool in lithography.

Paper Details

Date Published: 28 June 2005
PDF: 9 pages
Proc. SPIE 5853, Photomask and Next-Generation Lithography Mask Technology XII, (28 June 2005); doi: 10.1117/12.617033
Show Author Affiliations
Akira Imai, Renesas Technology Corp. (Japan)
Noboyuki Yoshioka, Renesas Technology Corp. (Japan)
Tetsuro Hanawa, Renesas Technology Corp. (Japan)
Koichiro Narimatsu, Renesas Technology Corp. (Japan)
Kunihiro Hosono, Renesas Technology Corp. (Japan)
Kazuyuki Suko, Renesas Technology Corp. (Japan)


Published in SPIE Proceedings Vol. 5853:
Photomask and Next-Generation Lithography Mask Technology XII
Masanori Komuro, Editor(s)

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