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Proceedings Paper

1/f noise in SOI buried oxides and alternative dielectrics to SiO2
Author(s): Daniel M. Fleetwood; Hao D. Xiong; Jonathan S. Lin
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Paper Abstract

We have studied the 1/f noise and the radiation response of transistors with silicon-on-insulator (SOI) buried oxides, and with Al2O3/SiOxNy/Si(100) gate dielectrics. The former is significant for understanding the response of advanced SOI transistor structures (e.g., double gate devices), and the latter is important for the incorporation of high-K gate dielectrics into advanced MOS processes. The 1/f noise of MOSFETs fabricated on silicon-implanted SOI buried oxides shows little change after 1 Mrad(SiO2) irradiation. Silicon implantation creates shallow electron traps in the buried oxide of the SOI devices, leading to improved radiation tolerance, but also additional noise and bias instabilities. Whether the traps that lead to these instabilities are filled or empty does not significantly affect the 1/f noise of the back-channel transistor. Low frequency noise in the strongly coupled front-to-back (quasi double-gate) mode of device operation is also investigated, and found to help mitigate the 1/f noise in fully depleted SOI MOSFETs. The decrease in noise is associated primarily with an increase in the number of carriers in the channel for this quasi double-gate mode of operation. In transistors with high-K dielectrics, the low-frequency noise is significantly larger than typically observed for high-quality thermal SiO2 thin films.

Paper Details

Date Published: 23 May 2005
PDF: 12 pages
Proc. SPIE 5844, Noise in Devices and Circuits III, (23 May 2005); doi: 10.1117/12.609720
Show Author Affiliations
Daniel M. Fleetwood, Vanderbilt Univ. (United States)
Hao D. Xiong, Vanderbilt Univ. (United States)
Jonathan S. Lin, Vanderbilt Univ. (United States)

Published in SPIE Proceedings Vol. 5844:
Noise in Devices and Circuits III
Alexander A. Balandin; Francois Danneville; M. Jamal Deen; Daniel M. Fleetwood, Editor(s)

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