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Proceedings Paper

Substrate noise coupling: a pain for mixed-signal systems
Author(s): Piet Wambacq; Geert Van der Plas; Stephane Donnay; Mustafa Badaroglu; Charlotte Soens
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Paper Abstract

Crosstalk from digital to analog in mixed-signal ICs is recognized as one of the major roadblocks for systems-on-chip (SoC) in future CMOS technologies. This crosstalk mainly happens via the semiconducting silicon substrate, which is usually treated as a ground node by analog and RF designers. The substrate noise coupling problem leads more and more to malfunctioning or extra design iterations. One of the reasons is that the phenomenon of substrate noise coupling is difficult to model and hence difficult to understand. It can be caused by the switching of thousands or millions of gates and depends on layout details. From the generation side (the digital domain), coping with the large amount of noise generators can be solved by macromodeling. On the other hand, the impact of substrate noise on the analog circuits requires careful modeling at the level of transistors and parasitics of layout, power supply, package, PCB, Comparison to measurements of macromodeling at the digital side and careful modeling at the analog side, shows that both the generation and the impact of substrate noise can be predicted with an accuracy of a few dB. In addition, this combination of macromodeling at the digital side and careful modeling at the analog side leads to an understanding of the problem, which can be used for digital low-noise design techniques to minimize the generation of noise, and substrate noise immune design of analog/RF circuits.

Paper Details

Date Published: 30 June 2005
PDF: 14 pages
Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.608442
Show Author Affiliations
Piet Wambacq, IMEC (Belgium)
Vrije Univ. Brussel (Belgium)
Geert Van der Plas, IMEC (Belgium)
Stephane Donnay, IMEC (Belgium)
Mustafa Badaroglu, IMEC (Belgium)
Charlotte Soens, IMEC (Belgium)
Vrije Univ. Brussel (Belgium)

Published in SPIE Proceedings Vol. 5837:
VLSI Circuits and Systems II
Jose Fco. Lopez; Francisco V. Fernandez; Jose Maria Lopez-Villegas; Jose M. de la Rosa, Editor(s)

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