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Proceedings Paper

Optimization algorithm for linearity enhancement in the design of continuous-time sigma-delta modulators
Author(s): S. Paton; L. Hernandez; R. Frutos; A. Di Giandomenico; A. Wiesbauer
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Paper Abstract

This paper proposes an optimization algorithm to reduce the distortion produced in the loop-filter of Continuous-Time Sigma-Delta Modulators. The aim of the algorithm is to find the loop-filter implementation that minimizes distortion at the output of the modulator, by modifying the output swing of every integrator. The algorithm is implemented in Matlab as an evolutive searching. During each step of the searching, the algorithm evaluates the harmonical distortion of a tone when it is applied to the modulator with a certain loop-filter implementation. The output of the algorithm is an optimum linear state-space representation of the loop-filter. This particular state-space representation leads to minimum distortion at the output of the modulator when the loop-filter is implemented with some specific circuitry previously defined. As long as the search is of evolutive type, the solution represents a local minimum only. The algorithm computes a random guess solution as the starting point for the optimization procedure, so that different local minimums may be found by running the algorithm itself several times. The algorithm has been applied to a 4th order 4-bit Continuous-Time Sigma-Delta Modulator as a simulation example.

Paper Details

Date Published: 30 June 2005
PDF: 7 pages
Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.608388
Show Author Affiliations
S. Paton, Univ. Carlos III de Madrid (Spain)
L. Hernandez, Univ. Carlos III de Madrid (Spain)
R. Frutos, Univ. Carlos III de Madrid (Spain)
A. Di Giandomenico, Infineon Technologies (Austria)
A. Wiesbauer, Infineon Technologies (Austria)

Published in SPIE Proceedings Vol. 5837:
VLSI Circuits and Systems II
Jose Fco. Lopez; Francisco V. Fernandez; Jose Maria Lopez-Villegas; Jose M. de la Rosa, Editor(s)

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