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Proceedings Paper

DC modeling of PN integrated cross varactors
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Paper Abstract

In this paper models for the capacitance of cross integrated varactors based in the PN junction are presented. Three different approximations are assumed, in order to reproduce the measured results of the capacitance. The relative error with the measured capacitance is under 10% in all cases.

Paper Details

Date Published: 30 June 2005
PDF: 8 pages
Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.608279
Show Author Affiliations
Benito Gonzalez, Univ. de Las Palmas de Gran Canaria (Spain)
Jose Antonio Perez, Univ. de Las Palmas de Gran Canaria (Spain)
Sunil L. Kemchandani, Univ. de Las Palmas de Gran Canaria (Spain)
Amaya Goni-Iturri, Univ. de Las Palmas de Gran Canaria (Spain)
Javier del Pino, Univ. de Las Palmas de Gran Canaria (Spain)
Javier Garcia, Univ. de Las Palmas de Gran Canaria (Spain)


Published in SPIE Proceedings Vol. 5837:
VLSI Circuits and Systems II
Jose Fco. Lopez; Francisco V. Fernandez; Jose Maria Lopez-Villegas; Jose M. de la Rosa, Editor(s)

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