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Proceedings Paper

A dual-mode complex ΔΣ ADC in CMOS for wireless-LAN receivers
Author(s): J. Arias; P. Kiss; V. Prodanov; V. Boccuzzi; M. Banu; D. Bisbal; J. San Pablo; L. Quintanilla; J. Barbolla
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Paper Abstract

In this work a dual-mode complex multibit continuous-time ΔΣ modulator for a standard 0.25μm CMOS technology is presented. This modulator is intended for the analog-to-digital conversion in multi-mode wireless-LAN receivers (802.11a/b/g) which require wide bandwidth and moderate resolution. Then, a low oversampling ratio of 16 along with a clock frequency of 320 MHz provides a signal bandwidth of 20 MHz for a 9-bit resolution with a second-order modulator. The modulator can be configured for two different modes of operation depending on the type of radio receiver chosen: "zero-IF" (ZIF) and "low-IF" (LIF). The former mode is better suited for 802.11b, while LIF mode is more adequate for 802.11a/g applications. The loop filter is based on transconductors and MOS-capacitors allowing for low power consumption and small chip area. The modulator also includes two 3-bit quantizers, both with their corresponding DWA scrambler. The supply voltage is 2.5V and the measured power consumption is 32 mW. Experimental results using both sine-wave and OFDM signals are presented. The obtained SNR and SNDR are 55dB and 53.5dB, respectively. A high image rejection of 47dB is achieved owing to proper layout techniques. When using OFDM signals, a minimum error vector magnitude of 1.3% is obtained. Finally, the active chip area is 0.44mm2 .

Paper Details

Date Published: 30 June 2005
PDF: 8 pages
Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.608193
Show Author Affiliations
J. Arias, Univ. de Valladolid (Spain)
P. Kiss, Agere Systems (United States)
V. Prodanov, Agere Systems (United States)
V. Boccuzzi, Agere Systems (United States)
M. Banu, Agere Systems (United States)
D. Bisbal, Univ. de Valladolid (Spain)
J. San Pablo, Univ. de Valladolid (Spain)
L. Quintanilla, Univ. de Valladolid (Spain)
J. Barbolla, Univ. de Valladolid (Spain)


Published in SPIE Proceedings Vol. 5837:
VLSI Circuits and Systems II
Jose Fco. Lopez; Francisco V. Fernandez; Jose Maria Lopez-Villegas; Jose M. de la Rosa, Editor(s)

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