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Proceedings Paper

A 2-V 0.35-µm CMOS DECT RF front end with on-chip frequency synthesizer
Author(s): D. Guermandi; E. Franchi; A. Gnudi; P. Rossi; F. Svelto; R. Castello
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Paper Abstract

An integrated CMOS RF front-end receiver complying with the DECT standard is presented. It is implemented in a standard 0.35μm CMOS technology operating with 2 V power supply and includes the Low Noise amplifier (LNA), the quadrature mixer and the frequency synthesizer. The frequency synthesizer is based on an integer-N Phase Locked Loop (PLL) and uses two coupled Voltage Controlled Oscillators (VCOs) for direct I/Q generation. The packaged circuit exhibits 9.2dB NF, -19.5 dBm IIP3, 27.5 dB gain and consumes 30mA. This work demonstrates the feasibility of an integrated RF front-end for a wide band standard using a direct conversion architecture that minimizes the number of external components and a cheap standard CMOS technology.

Paper Details

Date Published: 30 June 2005
PDF: 12 pages
Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.608109
Show Author Affiliations
D. Guermandi, Univ. of Bologna (Italy)
E. Franchi, Univ. of Bologna (Italy)
A. Gnudi, Univ. of Bologna (Italy)
P. Rossi, Univ. of Pavia (Italy)
F. Svelto, Univ. of Pavia (Italy)
R. Castello, Univ. of Pavia (Italy)


Published in SPIE Proceedings Vol. 5837:
VLSI Circuits and Systems II
Jose Fco. Lopez; Francisco V. Fernandez; Jose Maria Lopez-Villegas; Jose M. de la Rosa, Editor(s)

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