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Proceedings Paper

Computing a perfect input assignment for probabilistic verification
Author(s): Maxim Teslenko; Elena Dubrova; Hannu Tenhunen
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Paper Abstract

Design verification is the task of establishing that a given design meets the intended behavior. The growing complexity of verification instances requires new methods that can provide high quality verification coverage for large, complex designs. Probabilistic verification complements existing simulation-based and formal verification techniques by providing a distinct trade-off between coverage and capacity. Probabilistic approach maps two Boolean functions onto hash values and compare these values for equivalence. The major drawback of probabilistic verification is the non-zero probability of collision of hash values of two non-equivalent functions, producing "false positive" verification results. In this paper, we prove the existence of a perfect input assignment which never causes collisions. We show that the equivalence of hash values computed for a perfect input assignment implies the equivalence of functions with 100% probability.

Paper Details

Date Published: 30 June 2005
PDF: 8 pages
Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.607828
Show Author Affiliations
Maxim Teslenko, Royal Institute of Technology (Sweden)
Elena Dubrova, Royal Institute of Technology (Sweden)
Hannu Tenhunen, Royal Institute of Technology (Sweden)

Published in SPIE Proceedings Vol. 5837:
VLSI Circuits and Systems II
Jose Fco. Lopez; Francisco V. Fernandez; Jose Maria Lopez-Villegas; Jose M. de la Rosa, Editor(s)

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