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Proceedings Paper

Manufacturing-aware design methodology for assist feature correctness
Author(s): Puneet Gupta; Andrew B. Kahng; Chul-Hong Park
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Paper Abstract

Sub-resolution assist features (SRAFs) provide an absolutely essential technique for critical dimension (CD) control and process window enhancement in subwavelength lithography. As focus levels change during manufacturing, CDs at a given "legal" pitch can fail to achieve manufacturing tolerances required for adequate yield. Furthermore, adoption of off-axis illumination (OAI) and SRAF techniques to enhance resolution at minimum pitch worsens printability of patterns at other pitches. Our previous work [Gupta et al.] described a novel dynamic programming-based technique for Assist-Feature Correctness (AFCorr) to account for interactions within a cell row. We now extend the AFCorr methodology to handle vertical interactions of field polys between adjacent cell rows in the detailed placement of standard-cell designs. Pattern bridge between field poly geometries becomes a major reason for yield degradation even though CD variation of gates determines circuit performance. In this paper, AFCorr is validated in all possible horizontal (H-) and vertical (V-) interactions of polysilicon geometries in the layout. For benchmark designs, forbidden pitch count between polysilicon shapes of neighboring cells is reduced by 89%-100% in 130nm and 93%-100% in 90nm. Edge placement error (EPE) count is also reduced by 80%-98% in 130nm and 83%-100% in 90nm. AFCorr facilitates additional SRAF insertion by up to 7.4% for 130nm and 7.9% for 90nm. In addition, AFCorr provides substantial improvement in CD control with negligible timing, area, or CPU overhead. The advantages of AFCorr are expected to increase in future technology nodes.

Paper Details

Date Published: 5 May 2005
PDF: 10 pages
Proc. SPIE 5756, Design and Process Integration for Microelectronic Manufacturing III, (5 May 2005); doi: 10.1117/12.604872
Show Author Affiliations
Puneet Gupta, Blaze DFM, Inc. (United States)
Andrew B. Kahng, Blaze DFM, Inc. (United States)
Univ. of California/San Diego (United States)
Chul-Hong Park, Univ. of California/San Diego (United States)


Published in SPIE Proceedings Vol. 5756:
Design and Process Integration for Microelectronic Manufacturing III
Lars W. Liebmann, Editor(s)

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