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Proceedings Paper

Device and lithography contextual mask rule generation
Author(s): Young Mog Ham; Brian Dillon; Chris Progler; Kory Goldammer; Zhiziang Jin; Gary Green; R. Scott Mackay; Hitendra Divecha; Victor Boksha; Pat Martin; Mitch Heins; Yuan Zhang; Kurt Davis; Rafik Marutyan; Karen Martirosyan; Sergei Bakarian
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Paper Abstract

Mask manufacturing rules are usually determined from assumed or experimentally acquired mask-manufacturing limits. These rules are then applied during resolution enhancement data treatment to guide and/or limit pattern correction strategies. This technique can be highly reactive and may not allow a careful tradeoff between the mask making capability and the end user needs. We have explored techniques to develop mask manufacturability rules in the context of wafer lithography and device needs. In this paper, we consider methods to improve the capture and usage of mask making information for resolution enhancement by applying a novel test mask and design, which is tied to a process modeling software. Mask manufacturing models are established from the test maks design and these models are applied to generate geometrical rules and continuous models linking the mask making capability to the lithography requirements. The analysis of mask manufacturing constraints is extended into the device domain through yield prediction tools that capture the impact of lithography variability on device performance. We find techniques allowing a more dynamic generation of relevant mask making constraints that can optimize both yield and cycle time in the resolution ehancement process flow. Toward this, usage cases are highlighted to illustrate the interaction of specific design layouts and our mask manufacturability.

Paper Details

Date Published: 5 May 2005
PDF: 12 pages
Proc. SPIE 5756, Design and Process Integration for Microelectronic Manufacturing III, (5 May 2005); doi: 10.1117/12.600730
Show Author Affiliations
Young Mog Ham, Photronics, Inc. (United States)
Brian Dillon, HPL Technologies Inc. (United States)
Chris Progler, Photronics, Inc. (United States)
Kory Goldammer, HPL Technologies Inc. (United States)
Zhiziang Jin, HPL Technologies Inc. (United States)
Gary Green, HPL Technologies Inc. (United States)
R. Scott Mackay, Photronics, Inc. (United States)
Hitendra Divecha, HPL Technologies Inc. (United States)
Victor Boksha, HPL Technologies Inc. (United States)
Pat Martin, Photronics, Inc. (United States)
Mitch Heins, HPL Technologies Inc. (United States)
Yuan Zhang, Photronics, Inc. (United States)
Kurt Davis, HPL Technologies Inc. (United States)
Rafik Marutyan, HPL Technologies Inc. (United States)
Karen Martirosyan, HPL Technologies Inc. (United States)
Sergei Bakarian, HPL Technologies Inc. (United States)

Published in SPIE Proceedings Vol. 5756:
Design and Process Integration for Microelectronic Manufacturing III
Lars W. Liebmann, Editor(s)

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