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Proceedings Paper

Simulation of thermal resist flow process
Author(s): Sang-Kon Kim; Ilsin An; Hye-Keun Oh; Sun Muk Lee; Cheolkyu Bok; Seung Chan Moon
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Paper Abstract

In the semiconductor lithography process, the thermal flow process after development resolves the patterning of sub-100 nm contact hole and saves cost problem of resolution enhancement technology. In this study, resist flowing behavior and contact hole shrinkage are described by using the thermal reflow length of the boundary movement method and the analysis of image process. The viscosity variable affects the shrinkage of critical dimension. This variable is extracted from the experimental data by using a proposed equation. Those results have a good agreement with the experimental results in both contact hole size and the vertical wall of profile according to the baking temperature and time. Although the most effective process of the 193 nm chemically amplified resist is the post-expose bake process for critical dimension, the parameter of the development process, the inhibition reaction order of the enhanced Mack model, is shown as the most controllable parameter for critical dimension in thermal reflow process.

Paper Details

Date Published: 4 May 2005
PDF: 8 pages
Proc. SPIE 5753, Advances in Resist Technology and Processing XXII, (4 May 2005); doi: 10.1117/12.600699
Show Author Affiliations
Sang-Kon Kim, Hanyang Univ. (South Korea)
Ilsin An, Hanyang Univ. (South Korea)
Hye-Keun Oh, Hanyang Univ. (South Korea)
Sun Muk Lee, Seoul National Univ. (South Korea)
Cheolkyu Bok, Hynix Semiconductor Inc. (South Korea)
Seung Chan Moon, Hynix Semiconductor Inc. (South Korea)

Published in SPIE Proceedings Vol. 5753:
Advances in Resist Technology and Processing XXII
John L. Sturtevant, Editor(s)

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