Share Email Print
cover

Proceedings Paper

Line edge roughness reduction by plasma curing photoresists
Author(s): Arpan P. Mahorowala; Kuang-Jung Chen; Ratnam Sooriyakumaran; Aleksandra Clancy; Dakshi Murthy; Stacy Rasgon
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

Photoresist line edge roughness (LER) has been highlighted to have an adverse impact on device performance whereas post-etch LER is probably the more relevant metric. Post-etch LER can be reduced by migrating to thicker photoresist films or developing etch processes that are accompanied with lower energy ion bombardment. However, the photoresist and etching processes chosen might have desirable attributes and therefore cannot be changed, e.g. large process window or minimal nested-isolated feature etch bias. In this paper, we demonstrate the reduction of LER at the polysilicon gate level by an inexpensive treatment prior to etch. This HBr plasma treatment can be performed in the main etch chamber with minimal impact on wafer throughput. As a result, during the following etch steps, the photoresist mask is more homogeneous from an etch perspective which in turn helps lower the final LER. In addition, results from blanket etch studies on the various photoresist component films are shown. FTIR spectra of unetched and etched films are compared to demonstrate the preferential etching of certain photoresist/polymer components. The large differences observed in the unetched and etched film surface roughness values for certain photoresist components is postulated as an important source of final LER.

Paper Details

Date Published: 4 May 2005
PDF: 10 pages
Proc. SPIE 5753, Advances in Resist Technology and Processing XXII, (4 May 2005); doi: 10.1117/12.600043
Show Author Affiliations
Arpan P. Mahorowala, IBM T.J. Watson Research Ctr. (United States)
Kuang-Jung Chen, IBM Corp. (United States)
Ratnam Sooriyakumaran, IBM Almaden Reserach Ctr. (United States)
Aleksandra Clancy, IBM T.J. Watson Research Ctr. (United States)
Dakshi Murthy, Advanced Micro Devices (United States)
Stacy Rasgon, Massachusetts Institute of Technology (United States)


Published in SPIE Proceedings Vol. 5753:
Advances in Resist Technology and Processing XXII
John L. Sturtevant, Editor(s)

© SPIE. Terms of Use
Back to Top