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Proceedings Paper

Physically based compact models for fast lithography simulation
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Paper Abstract

Among other requirements, a state-of-the-art lithography process is composed of advanced hardware tools and resolution enhancement techniques (RET). The successful application of these techniques depends on fast and accurate simulation of the pattern transfer process. In this paper, state-of-the-art modeling techniques are investigated and compared with on-wafer measurement results obtained using a 0.75NA ArF scanner. In particular, the correct separation of optical and process effects in a TCCcalc lithography model is evaluated by comparison of experimental results to simulation results, based on systematic changes of the process conditions. Statistical fits are generated to compare measured vs. simulated data sets. In each experiment, the model correctly predicts the process behavior, and error levels remain constant or within several nanometers of the baseline conditions. CD-SEM images of several patterns at various conditions were overlaid to simulated printed images. The overlaid images show good prediction of final wafer printed images, even under non-baseline conditions. This evaluation confirms the separation between optical and resist model.

Paper Details

Date Published: 12 May 2004
PDF: 6 pages
Proc. SPIE 5754, Optical Microlithography XVIII, (12 May 2004); doi: 10.1117/12.599889
Show Author Affiliations
Neal Lafferty, Mentor Graphics Corp. (United States)
IMEC (Belgium)
Kostas Adam, Mentor Graphics Corp. (United States)
Yuri Granik, Mentor Graphics Corp. (United States)
Andres Torres, Mentor Graphics Corp. (United States)
Wilhelm Maurer, Infineon Technologies (Germany)


Published in SPIE Proceedings Vol. 5754:
Optical Microlithography XVIII
Bruce W. Smith, Editor(s)

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