Share Email Print
cover

Proceedings Paper

In-chip overlay measurement by existing bright-field imaging optical tools
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

We have developed a target design for overlay measurement which is small enough (3x3μm) that it could be positioned within the active area of integrated circuit devices. These targets have been measured using an unmodified overlay tool. The targets are too small for the image to be fully resolved using visible wavelengths, and so measurement using the normal methods based on determining the relative positions of features in the image does not produce acceptable levels of measurement uncertainty. Instead, we show that the symmetry of the image can be used to determine the overlay error. We report initial results which show measurement uncertainty using this technique approaching the levels needed for overlay control at design rules under 100nm. These results are limited by the process used to create our test structures, and even better results may be possible with state-of-the-art lithography and processing techniques.

Paper Details

Date Published: 10 May 2005
PDF: 11 pages
Proc. SPIE 5752, Metrology, Inspection, and Process Control for Microlithography XIX, (10 May 2005); doi: 10.1117/12.599054
Show Author Affiliations
Yi-Sha Ku, Industrial Technology Research Institute (Taiwan)
Chi-Hong Tung, Industrial Technology Research Institute (Taiwan)
Nigel P. Smith, Accent Optical Technologies (Taiwan)


Published in SPIE Proceedings Vol. 5752:
Metrology, Inspection, and Process Control for Microlithography XIX
Richard M. Silver, Editor(s)

© SPIE. Terms of Use
Back to Top