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Proceedings Paper

Integrated circuit DFM framework for deep sub-wavelength processes
Author(s): J. A. Torres; C. N. Berglund
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Paper Abstract

Until recently little has been done to formalize the concept of design for manufacturability (DFM) for integrated circuits. This is a complex problem that has been addressed from multiple angles with different degrees of success . While there can be certain operations which improve one manufacturability component, they can also adversely affect another. For this reason a framework that systematically addresses multiple manufacturability tradeoffs is required. This work proposes a pattern-centric DFM framework which emphasizes pattern robustness and introduces the concept of process variability bands (pv-Bands) to create a ranking system to measure the manufacturability of any design. The ranking system is composed of manufacturability indices, and their behavior is presented for different process nodes as well as across multiple processing layers (i.e. metal1, active, poly, etc). As an example of the necessity of such a framework, lithography-compliant rules are defined to suggest how other manufacturing processing steps need to be characterized in order to be successfully integrated in the framework. Examples of pinching (necking), bridging and CD control rules based on a pv-Band description are also discussed. In addition this work includes a description on how the process models derived from this study can be used to improve electrical analysis via a more accurate device description. As an example, timing-process-windows are defined as the link between design requirements and pattern manufacturability, and indicate why electrical models need to explicitly account for pattern induced effects at conditions other than nominal.

Paper Details

Date Published: 5 May 2005
PDF: 12 pages
Proc. SPIE 5756, Design and Process Integration for Microelectronic Manufacturing III, (5 May 2005); doi: 10.1117/12.599044
Show Author Affiliations
J. A. Torres, Mentor Graphics Corp. (United States)
C. N. Berglund, Portland State Univ. (United States)


Published in SPIE Proceedings Vol. 5756:
Design and Process Integration for Microelectronic Manufacturing III
Lars W. Liebmann, Editor(s)

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