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Proceedings Paper

Hurdles in low k1 mass production
Author(s): Donggyu Yim; Hyunjo Yang; Chanha Park; Jongkyun Hong; Jaeseung Choi
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Paper Abstract

As the optical lithography pushes toward its theoretical resolution limit 0.25k1, the application of aggressive Resolution Enhancement Techniques (RETs) are required in order to ensure necessary resolution, sufficient process window, and reasonable MEEF in critical layers. When chip makers are adopting RETs in low k1 device, there are a lot of crucial factors to take into account in the development and mass production. Those hurdles are not only difficult to overcome but also highly risky to the company, which adopts low k1 mass production strategy. But, low k1 production strategy is very attractive to all chip makers, owing to improving production capacity and cost of ownership. So, low k1 technology has been investigated by many lithography engineers. Lots of materials have been introduced. Most of them are just in RnD level. In this study, low k1 mass production issues shall be introduced, mainly. The definition of low k1 in mass production shall be suggested. And, a lot of low_k1 issues shall be introduced, also. Most of them were investigated/experienced in RnD development stage and final mass production line. Low k1 mass production, is some what different from only RnD development.

Paper Details

Date Published: 12 May 2004
PDF: 8 pages
Proc. SPIE 5754, Optical Microlithography XVIII, (12 May 2004); doi: 10.1117/12.598625
Show Author Affiliations
Donggyu Yim, Hynix Semiconductor Inc. (South Korea)
Hyunjo Yang, Hynix Semiconductor Inc. (South Korea)
Chanha Park, Hynix Semiconductor Inc. (South Korea)
Jongkyun Hong, Hynix Semiconductor Inc. (South Korea)
Jaeseung Choi, Hynix Semiconductor Inc. (South Korea)


Published in SPIE Proceedings Vol. 5754:
Optical Microlithography XVIII
Bruce W. Smith, Editor(s)

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