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Proceedings Paper

Integrated circuit critical-dimension optimization through correlation of resist spin speed, substrate reflectance, and scanning electron microscope measurements
Author(s): Anne M. Kaiser; Robert M. Haney
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Paper Abstract

A procedure is described for predicting the optimum resist thickness to insure a reflectivity minimum at the wavelength of interest regardless of the underlying surface reflectivity. An experiment was performed using polysilicon on oxide wafers to demonstrate that uniform CDs could be patterned for a variety of reflectances.

Paper Details

Date Published: 1 June 1992
PDF: 11 pages
Proc. SPIE 1673, Integrated Circuit Metrology, Inspection, and Process Control VI, (1 June 1992); doi: 10.1117/12.59802
Show Author Affiliations
Anne M. Kaiser, Tencor Instruments (United States)
Robert M. Haney, Nikon Precision, Inc. (United States)


Published in SPIE Proceedings Vol. 1673:
Integrated Circuit Metrology, Inspection, and Process Control VI
Michael T. Postek, Editor(s)

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