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Proceedings Paper

Novel resist patterning strategies for the definition of high resolution via holes in polyimide interlayer dielectric
Author(s): Brian Martin; Neil M. Harper
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Paper Abstract

Lithography for via holes in polyimide is conventionally restricted by the need for a thick masking resist due to poor plasma selectivity during pattern transfer. Two novel techniques for via hole definition are described. The first is a single layer masking process using a silicon containing resist, which presents high resistance to oxygen plasma, while the other is a `hard' masking process using spin-on-glass. Processing and characterization for each technique is described and compared with the standard process.

Paper Details

Date Published: 1 June 1992
PDF: 11 pages
Proc. SPIE 1672, Advances in Resist Technology and Processing IX, (1 June 1992); doi: 10.1117/12.59769
Show Author Affiliations
Brian Martin, GEC-Plessey Semiconductors Ltd. (United Kingdom)
Neil M. Harper, GEC-Plessey Semiconductors Ltd. (United Kingdom)


Published in SPIE Proceedings Vol. 1672:
Advances in Resist Technology and Processing IX
Anthony E. Novembre, Editor(s)

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