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Proceedings Paper

Geometrical analysis of product layout as a powerful tool for DFM (Invited Paper)
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Paper Abstract

Recently, "design for manufacturability" (DFM) has become a veritable buzzword in the semiconductor manufacturing community. DFM activities cover a broad spectrum ranging from the improvement of the electrical and structural robustness against process variations to the reduction of layout parts critical for statistically distributed defects or sensitive to systematic process weaknesses. In our work we focus only on those aspects of DFM concerned with the structural integrity of patterns on the wafer. We show that a purely geometrical analysis of product layouts offers a powerful tool to strengthen the link between design and manufacturing. It allows, for instance, a visualisation of the extent to which intra- and inter-layer design rules determine the geometry configurations dominating the layout and the identification of patterns occurring only rarely. Furthermore, in combination with the geometry-resolved information about the accuracy of "optical proximity correction" (OPC) models and "critical dimension" (CD) control, such an analysis provides valuable input for systematic improvements on both, the product layout and manufacturing process side. In this sense it supports the progress towards making real designs still manufacturable at the limits of process tool capabilities.

Paper Details

Date Published: 5 May 2005
PDF: 11 pages
Proc. SPIE 5756, Design and Process Integration for Microelectronic Manufacturing III, (5 May 2005); doi: 10.1117/12.595062
Show Author Affiliations
Thomas Roessler, Infineon Technologies AG (Germany)
Joerg Thiele, Infineon Technologies AG (Germany)


Published in SPIE Proceedings Vol. 5756:
Design and Process Integration for Microelectronic Manufacturing III
Lars W. Liebmann, Editor(s)

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