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Proceedings Paper

A decimal carry-free adder
Author(s): Hooman Nikmehr; Braden Phillips; Cheng-Chew Lim
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Paper Abstract

Recently, decimal arithmetic has become attractive in the financial and commercial world including banking, tax calculation, currency conversion, insurance and accounting. Although computers are still carrying out decimal calculation using software libraries and binary floating-point numbers, it is likely that in the near future, all processors will be equipped with units performing decimal operations directly on decimal operands. One critical building block for some complex decimal operations is the decimal carry-free adder. This paper discusses the mathematical framework of the addition, introduces a new signed-digit format for representing decimal numbers and presents an efficient architectural implementation. Delay estimation analysis shows that the adder offers improved performance over earlier designs.

Paper Details

Date Published: 28 February 2005
PDF: 12 pages
Proc. SPIE 5649, Smart Structures, Devices, and Systems II, (28 February 2005); doi: 10.1117/12.584722
Show Author Affiliations
Hooman Nikmehr, The Univ. of Adelaide (Australia)
Bu Ali Sina Univ. (Iran)
Braden Phillips, The Univ. of Adelaide (Australia)
Cheng-Chew Lim, The Univ. of Adelaide (Australia)


Published in SPIE Proceedings Vol. 5649:
Smart Structures, Devices, and Systems II
Said F. Al-Sarawi, Editor(s)

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