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Proceedings Paper

Architectures for single-chip image computing
Author(s): Robert John Gove
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Paper Abstract

This paper will focus on the architectures of VLSI programmable processing components for image computing applications. TI, the maker of industry-leading RISC, DSP, and graphics components, has developed an architecture for a new-generation of image processors capable of implementing a plurality of image, graphics, video, and audio computing functions. We will show that the use of a single-chip heterogeneous MIMD parallel architecture best suits this class of processors--those which will dominate the desktop multimedia, document imaging, computer graphics, and visualization systems of this decade.

Paper Details

Date Published: 30 April 1992
PDF: 11 pages
Proc. SPIE 1659, Image Processing and Interchange: Implementation and Systems, (30 April 1992); doi: 10.1117/12.58394
Show Author Affiliations
Robert John Gove, Texas Instruments Inc. (United States)

Published in SPIE Proceedings Vol. 1659:
Image Processing and Interchange: Implementation and Systems
Ronald B. Arps; William K. Pratt, Editor(s)

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