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Proceedings Paper

A merged modular/nonmodular multiplier
Author(s): Braden Phillips
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Paper Abstract

A new hardware architecture is described to perform multiplication and modular multiplication with a modulus of variable wordlength. It is intended for a microprocessor datapath to support efficient implementation of long wordlength operations using the residue number system.

Paper Details

Date Published: 28 February 2005
PDF: 8 pages
Proc. SPIE 5649, Smart Structures, Devices, and Systems II, (28 February 2005); doi: 10.1117/12.582259
Show Author Affiliations
Braden Phillips, The Univ. of Adelaide (Australia)


Published in SPIE Proceedings Vol. 5649:
Smart Structures, Devices, and Systems II
Said F. Al-Sarawi, Editor(s)

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