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PMJ (Photomask Japan) 2004 panel overview: Issues on mask technology for 65-nm lithography with ArF
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Paper Abstract

At the panel discussion of Photomask Japan 2004, we discussed about "Issues on mask technology for 65nm lithography with ArF". The summary of the PMJ2004 panel discussion is as follows: (1) 65nm node will be achieved with ArF immersion/dry lithography, (2) Attenuated PSM, Alternative PSM and Gate-Shrink will be used for 65nm device production., (3) there are no red brick walls for 65nm mask making, though there are many issues to be solved for 65nm mask fabrication; CD control, inspection, writer, repair, metrology and mask cost. The message from the panel discussion of PMJ2004 is "The mask technology will be ready for 65nm device development and production at 2007" For the business success, chip makers, mask manufacturers, EDA tool and equipment suppliers should work together in order to reduce the mask cost and cycle time.

Paper Details

Date Published: 6 December 2004
PDF: 10 pages
Proc. SPIE 5567, 24th Annual BACUS Symposium on Photomask Technology, (6 December 2004); doi: 10.1117/12.580023
Show Author Affiliations
Hisashi Watanabe, Matsushita Electric Industrial Co., Ltd. (Japan)
Hidehiro Watanabe, Toshiba Corp. (Japan)

Published in SPIE Proceedings Vol. 5567:
24th Annual BACUS Symposium on Photomask Technology
Wolfgang Staud; J. Tracy Weed, Editor(s)

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