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Proceedings Paper

Motion estimation and compensation optimization on IA32 CPU
Author(s): Yihua Du; Chang Liu
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Paper Abstract

Motion estimation (ME) and compensation (MC) is critical to the performance of an encoder, because the procedure is computationally intensive. To reduce the calculation, people work out some kinds of fast search algorithms for motion estimation, and dramatically improve the performance. This paper uses the Intel Pentium CPU's MMX, XMM registers and some Single Instruction Multiple Data (SIMD) instructions to accelerate the calculation, especially, uses PNI (Prescott New Instruction). We could load more pixels' values to a register at the same time. With PNI’s instruction LDDQU, we could load 16 bytes to XMM register even they cross a cache line boundary. Therefore, we could calculate (add, subtract, average, get absolute differences) multiple samples in a single operation. The parallel operations will significantly increase the speed of the ME and MC, irrespective of which kind of search algorithm.

Paper Details

Date Published: 8 February 2005
PDF: 10 pages
Proc. SPIE 5637, Electronic Imaging and Multimedia Technology IV, (8 February 2005); doi: 10.1117/12.574305
Show Author Affiliations
Yihua Du, Zhejiang Univ. (China)
Chang Liu, Zhejiang Univ. (China)

Published in SPIE Proceedings Vol. 5637:
Electronic Imaging and Multimedia Technology IV
Chung-Sheng Li; Minerva M. Yeung, Editor(s)

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