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Proceedings Paper

VLSI process expert diagnostic system
Author(s): Michael E. Parten; Robert F. Tyson; Atindra K. Mitra; Jerry Lovelace
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Paper Abstract

In a proposed process diagnostic system, a template correlation routine is used to identify the pattern produced on a wafer by bad die. The same pattern recognition routine can be applied to the pattern produced on the wafer from the result or different types of failure of the die. The overall wafer pattern, the individual test patterns, and electrical measurements made during final test form the input data to an expert system. In turn, the expert system uses heuristic algorithms that identify probable process problems, The template correlation routines have been successfully developed and implemented. Current efforts are dedicated to the knowledge engineering phase of the project. The expert system will, at first, identify defects to the process level. Future refinements will permit the diagnostic tool to identify the defect by name as well as process. Successful development and implementation of this system will save the labor of manual investigation of anomalous events in the fabrication of VLSI devices. Used in conjunction with statistical process control, this system should improve VLSI device yield.

Paper Details

Date Published: 1 January 1992
PDF: 7 pages
Proc. SPIE 1594, Process Module Metrology, Control and Clustering, (1 January 1992); doi: 10.1117/12.56627
Show Author Affiliations
Michael E. Parten, Texas Tech Univ. (United States)
Robert F. Tyson, Texas Tech Univ. (United States)
Atindra K. Mitra, Texas Tech Univ. (United States)
Jerry Lovelace, Texas Instruments Inc. (United States)


Published in SPIE Proceedings Vol. 1594:
Process Module Metrology, Control and Clustering
Cecil J. Davis; Irving P. Herman; Terry R. Turner, Editor(s)

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