Share Email Print
cover

Proceedings Paper

A comparative study of modular adders
Format Member Price Non-Member Price
PDF $17.00 $21.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

This paper presents the methods we used to achieve an exhaustive comparison of specific arithmetic operators and the result of this comparative study. The operators we were interested in are modular adders that can be used for Residue Number System (RNS) processors. RNS arithmetic provides an alternative way to produce highly effective multiplication and addition and are, therefore, of great interest for signal processing processors. As modular adders are at the root of any RNS processor, attention must be payed to their design. We expose three different existing designs for such adders and through the construction and use of generators that produce 0.35μ standard cell architectures, we synthesized those three designs for all odd moduli from 4 to 15 bits and measured their performance. Performance was measured after placement and routing of those operators providing precise results. The exhaustive data obtained let us compare those three designs based on size, speed or any combination of those two fore-mentioned factors. Eventually this study gives clues on choosing a specific modular adder for a given modulus and also for choosing the best candidates for a well balanced residue base (i.e. choosing a good set of moduli). Furthermore, it shows that the described parallel modular adder is generally the best choice.

Paper Details

Date Published: 26 October 2004
PDF: 8 pages
Proc. SPIE 5559, Advanced Signal Processing Algorithms, Architectures, and Implementations XIV, (26 October 2004); doi: 10.1117/12.559379
Show Author Affiliations
Laurent-Stephane Didier, Univ. Pierre et Marie Curie (France)
Pierre-Yves H. Rivaille, Univ. Pierre et Marie Curie (France)


Published in SPIE Proceedings Vol. 5559:
Advanced Signal Processing Algorithms, Architectures, and Implementations XIV
Franklin T. Luk, Editor(s)

© SPIE. Terms of Use
Back to Top