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Proceedings Paper

EUVL defect printability at the 32-nm node
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Paper Abstract

The printability of both amplitude and phase defects has been investigated in proximity to absorber lines with widths corresponding to the 45 nm and 32 nm nodes. The single surface approximation was used to simulate defects within the multilayer coating. The printability of Gaussian phase defects was simulated versus width and height and location with respect to the absorber line. For narrow defects the worst location was found to be next to the absorber line, while wide defects had the greatest effect when centered under the absorber. A uniform flare was found to have little effect on the critical defect size. The results of these simulations are aimed at defining the critical defects for EUVL masks designed for the 32 nm node.

Paper Details

Date Published: 20 May 2004
PDF: 6 pages
Proc. SPIE 5374, Emerging Lithographic Technologies VIII, (20 May 2004); doi: 10.1117/12.558816
Show Author Affiliations
Eric M. Gullikson, Lawrence Berkeley National Lab. (United States)
Edita Tejnil, Intel Corp. (United States)
Ted Liang, Intel Corp. (United States)
Alan R. Stivers, Intel Corp. (United States)


Published in SPIE Proceedings Vol. 5374:
Emerging Lithographic Technologies VIII
R. Scott Mackay, Editor(s)

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