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Proceedings Paper

Tolerance-based process proximity correction (PPC) verification methodology
Author(s): Kohji Hashimoto; Hiroharu Fujise; Shigeki Nojima; Takeshi Ito; Takahiro Ikeda
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Paper Abstract

Tolerance-based process proximity correction (PPC) verification methodology is proposed for “hot spot management” in LSI fabrication process flow. This methodology verifies the PPC accuracy with the features of actual processed wafers/masks and target features in CAD data including CD tolerance around hot spots. The CD tolerance in CAD data is decided according to device characteristics, process integration, CD budget, and so on, and is used for the judgment criteria of the PPC accuracy. After the verifications, the actions in the manufacturing are decided. This methodology is demonstrated for the 65nm-node CMOS local metal at three representative hot spots extracted by lithography simulation, and the results yielded useful information for the manufacturing.

Paper Details

Date Published: 20 August 2004
PDF: 10 pages
Proc. SPIE 5446, Photomask and Next-Generation Lithography Mask Technology XI, (20 August 2004); doi: 10.1117/12.557795
Show Author Affiliations
Kohji Hashimoto, Toshiba Corp. (Japan)
Hiroharu Fujise, Toshiba Corp. (Japan)
Shigeki Nojima, Toshiba Corp. (Japan)
Takeshi Ito, Toshiba Corp. (Japan)
Takahiro Ikeda, Toshiba Corp. (Japan)


Published in SPIE Proceedings Vol. 5446:
Photomask and Next-Generation Lithography Mask Technology XI
Hiroyoshi Tanabe, Editor(s)

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