Share Email Print
cover

Proceedings Paper

Optical mask inspection strategy for 65-nm node and beyond
Author(s): Dong-Hoon Paul Chung; Katsumi Ohira; Nobuyuki Yoshioka; Kenichi Matsumura; Toru Tojo; Masao Otaki
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

As semiconductor integration goes down to nano-meter scale, finer patterning technology is inevitable. Therefore it is more and more important not only new lithographic development but also mask quality enhancement. Particularly, due to the delay of NGL technology, optical lithography is growing candidate for 65nm and beyond node device. In that case, mask CD uniformity and defect control issues are more important than ever. In mask inspection technology, there were a lot of new progresses to enhance the defect inspection sensitivity and stability via short-wavelength and advanced defect inspection algorithms. In this paper, we will present a concept and on going status of newly developed short-wavelength DUV inspection tool that is co-worked by Selete, Toshiba, and NEC. Moreover, we will discuss defect specifications that is required 65nm node and beyond technology node by simulations. This will include relations between defect inspectability and printability in the case of ArF, ArF immersion, and F2 lithography in various layouts and patterns. Through this study, we can conclude stable short-wavelength inspection tool and proper inspection algorithms are essential for future generation mask to cope with low k1 lithography.

Paper Details

Date Published: 20 August 2004
PDF: 10 pages
Proc. SPIE 5446, Photomask and Next-Generation Lithography Mask Technology XI, (20 August 2004); doi: 10.1117/12.557726
Show Author Affiliations
Dong-Hoon Paul Chung, Semiconductor Leading Edge Technologies, Inc. (Japan)
Katsumi Ohira, Semiconductor Leading Edge Technologies, Inc. (Japan)
Nobuyuki Yoshioka, Semiconductor Leading Edge Technologies, Inc. (Japan)
Kenichi Matsumura, NEC Corp. (Japan)
Toru Tojo, Toshiba Corp. (Japan)
Masao Otaki, Toppan Printing Co., Ltd. (Japan)


Published in SPIE Proceedings Vol. 5446:
Photomask and Next-Generation Lithography Mask Technology XI
Hiroyoshi Tanabe, Editor(s)

© SPIE. Terms of Use
Back to Top