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Proceedings Paper

Achieving 65-nm design rule dry etch performance: a study of CD bias, uniformity, and linearity on binary chrome photomasks
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Paper Abstract

To overcome the resolution limits of the current generation of steppers, mask makers are forced to include an ever-growing number of OPC features on 65 nm node masks. Although lithography techniques have improved significantly in the last five years, they have not kept pace with the needs of 65 nm technology. To produce viable OPC features at the 65 nm node, the etch process must be capable of accurately defining on the mask features as small as 100 nm. The etch must also show reasonable linearity to prevent distortion of the primary features. To this end, a four factor, irregular fraction factorial design was performed using a 4th generation mask etch system. The factors in this design include RIE power, RIE coupling efficiency, ICP power, and pressure. These factors were selected for their influence on CD bias, CD uniformity, and CD linearity. The results of this design will be presented, along with an optimized solution. This solution is demonstrated on an asymmetric test pattern representative of logic or ASIC devices, as well as an evenly loaded pattern more representative of memory devices.

Paper Details

Date Published: 20 August 2004
PDF: 6 pages
Proc. SPIE 5446, Photomask and Next-Generation Lithography Mask Technology XI, (20 August 2004); doi: 10.1117/12.557706
Show Author Affiliations
Jason Plumhoff, Unaxis USA, Inc. (United States)
Chris Constantine, Unaxis USA, Inc. (United States)
Brad H. Reelfs, Unaxis USA, Inc. (United States)

Published in SPIE Proceedings Vol. 5446:
Photomask and Next-Generation Lithography Mask Technology XI
Hiroyoshi Tanabe, Editor(s)

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