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Proceedings Paper

Characterization of outgassing for EUV technology
Author(s): Vani Thirumala; Heidi B. Cao; Wang Yueh; Hokkin Choi; Victoria Golovkina; John Wallace; Paul F. Nealey; Don Thielman; Franco Cerrina
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Paper Abstract

Outgassing of photoresists needs to be minimized to avoid contamination of optics. A new challenge for EUV photoresists - that was not encountered for previous lithography technologies - is that exposures will occur in a vacuum environment. In order to design resists that meet the outgassing requirements for EUV lithography, current EUV photoresists need to be tested to determine if there are any performance gaps. In this paper we will describe the outgassing set-up for the outgassing chamber at the University of Wisconsin, and document Intel’s best known method for collecting and analyzing EUV outgassing data. In addition we will present preliminary outgassing results to benchmark the performance of Intel’s outgassing procedure.

Paper Details

Date Published: 14 May 2004
PDF: 8 pages
Proc. SPIE 5376, Advances in Resist Technology and Processing XXI, (14 May 2004); doi: 10.1117/12.536052
Show Author Affiliations
Vani Thirumala, Intel Corp. (United States)
Heidi B. Cao, Intel Corp. (United States)
Wang Yueh, Intel Corp. (United States)
Hokkin Choi, Intel Corp. (United States)
Victoria Golovkina, Univ. of Wisconsin/Madison (United States)
John Wallace, Univ. of Wisconsin/Madison (United States)
Paul F. Nealey, Univ. of Wisconsin/Madison (United States)
Don Thielman, Univ. of Wisconsin/Madison (United States)
Franco Cerrina, Univ. of Wisconsin/Madison (United States)


Published in SPIE Proceedings Vol. 5376:
Advances in Resist Technology and Processing XXI
John L. Sturtevant, Editor(s)

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