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Proceedings Paper

Sources of line-width roughness for EUV resists
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Paper Abstract

Resists for the next generation of lithography must be able to meet stringent line width roughness (LWR) targets. The LWR requirements, governed by device performance, are the same regardless of the lithographic technology that is chosen. Unfortunately no resist platform for any technology (EUV, 157 nm, 193 nm) is on track to meet the targets for the 45 nm and the 32 nm technology nodes. In order to understand the fundamental sources of LWR, we designed an experiment to statistically vary resist parameters for EUV resists. The results of this study show methods to improve LWR and shed light on the sources of LWR.

Paper Details

Date Published: 14 May 2004
PDF: 8 pages
Proc. SPIE 5376, Advances in Resist Technology and Processing XXI, (14 May 2004); doi: 10.1117/12.536041
Show Author Affiliations
Heidi B. Cao, Intel Corp. (United States)
Wang Yueh, Intel Corp. (United States)
Bryan J Rice, Intel Corp. (United States)
Jeanette Roberts, Intel Corp. (United States)
Terence Bacuita, Intel Corp. (United States)
Manish Chandhok, Intel Corp. (United States)


Published in SPIE Proceedings Vol. 5376:
Advances in Resist Technology and Processing XXI
John L. Sturtevant, Editor(s)

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