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Proceedings Paper

Optimization method of edge shot yield for various wafer layouts
Author(s): Anna Eidelman; Avi Blau; Irit K. Abramovich
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Paper Abstract

Transfer of a layer layout from a reticle onto a photoresist-covered wafer using stepper exposure systems, can prove to be a challenging process to handle. This task becomes even more challenging when reaching the backend stages of the process, where the wafer topography variations at the wafer edge reach their maximum values. In advanced processes, where superposition of the exposure system focus plane and the wafer plane is critical, the focus is measured for every field before exposure is carried out, and the focus position of the exposure tool corrected. This can become complicated when the wafer edge is approached, and the focusing system measures a point or points, which do not represent the majority of the field plane. The outcome of the above can be an out of focus field exposure, resulting in feature degradation on the wafer, which in turn will be translated directly to wafer yield loss. The aim of this paper is to describe the achievement of yield optimization on various wafer layouts through the evaluation of various stepper focus algorithms, verification systems used to check the effectiveness of the fix, the follow-up table concept used for ease of fix validation, and eventually, the probe yield results of the chosen focus algorithm compared to those achieved prior to the optimization.

Paper Details

Date Published: 24 May 2004
PDF: 9 pages
Proc. SPIE 5375, Metrology, Inspection, and Process Control for Microlithography XVIII, (24 May 2004); doi: 10.1117/12.535201
Show Author Affiliations
Anna Eidelman, Tower Semiconductor, Ltd. (Israel)
Avi Blau, Tower Semiconductor, Ltd. (Israel)
Irit K. Abramovich, Tower Semiconductor, Ltd. (Israel)

Published in SPIE Proceedings Vol. 5375:
Metrology, Inspection, and Process Control for Microlithography XVIII
Richard M. Silver, Editor(s)

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