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Proceedings Paper

Preliminary results of EB stepper in the application of 65-nm process
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Paper Abstract

Electron projection lithography (EPL) is a promising candidate for next-generation lithography (NGL) at the 65 nm technology node and beyond. Nikon has developed the world's first full-field EPL exposure tool, Nikon's NSR-EB1A. This tool was shipped to Selete in June 2003. Final installation is still in progress, but we have begun evaluating its applicability to the 65 nm technology node through trial fabrication of a test element group (TEG). A TEG of via-hole chains consisting of 1st metal, 1st via, and 2nd metal layers was fabricated using optical/EPL mix-and-match lithography. We applied EPL to the via layer. The purpose of the first fabrication is to clarify practical hole resolution of the EPL tool because EPL is expected to define finer hole patterns and enable denser integration than optical lithography. To prevent defects in metal layers from adversely affecting evaluation, we used moderate pattern layouts in metal layers. Metal layers were defined by an ArF scanner to obtain good pattern fidelity and sufficient pattern yield. We used a single damascene process with a low-k insulator and Cu interconnection. Practical hole resolution was evaluated by electrical measurement and SEM and TEM observation. SEM confirmed that via holes of 70 nm were resolved. TEM confirmed that via-hole chains of 80 nm were fabricated. Electrical measurement confirmed electrical conduction through via-hole chains of 75 nm. These results suggest that applying EPL to hole layers could realize denser integration than optical lithography. EPL application to TEG trial fabrication demonstrates its high-resolution capability in practical use.

Paper Details

Date Published: 20 May 2004
PDF: 9 pages
Proc. SPIE 5374, Emerging Lithographic Technologies VIII, (20 May 2004); doi: 10.1117/12.534875
Show Author Affiliations
Hiroshi Takenaka, Semiconductor Leading Edge Technologies, Inc. (Japan)
Kaoru Koike, Semiconductor Leading Edge Technologies, Inc. (Japan)
Takahiro Tsuchida, Semiconductor Leading Edge Technologies, Inc. (Japan)
Fumihiro Koba, Semiconductor Leading Edge Technologies, Inc. (Japan)
Hiroshi Sakaue, Semiconductor Leading Edge Technologies, Inc. (Japan)
Masaki Yamabe, Semiconductor Leading Edge Technologies, Inc. (Japan)


Published in SPIE Proceedings Vol. 5374:
Emerging Lithographic Technologies VIII
R. Scott Mackay, Editor(s)

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