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Proceedings Paper

MPLS switch architecture supporting Diffserv for high-speed switching and QoS
Author(s): Tae-Won Lee; Young-Chul Kim; Mike Myung-Ok Lee
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Paper Abstract

In this paper, we propose the architecture of the MPLS switch supporting Differentiated Services in the MPLS-based network. The traffic conditioner consists of a classifier, a meter, and a marker. The VOQ-PHB module which combines input queue with each PHB queue is implemented to utilize the resources more efficiently, employing the Priority-iSLIP scheduling algorithm to support high-speed switching. The proposed MPLS switch architecture is modeled and synthesized by Very High Speed Integrated Circuits Hardware Description Language (VHDL), verified and then implemented by commercialized CAD tools to justify the validity of the proposed hardware architecture.

Paper Details

Date Published: 30 March 2004
PDF: 7 pages
Proc. SPIE 5274, Microelectronics: Design, Technology, and Packaging, (30 March 2004); doi: 10.1117/12.528585
Show Author Affiliations
Tae-Won Lee, Chonnam National Univ. (South Korea)
Young-Chul Kim, Chonnam National Univ. (South Korea)
Mike Myung-Ok Lee, Dongshin Univ. (South Korea)


Published in SPIE Proceedings Vol. 5274:
Microelectronics: Design, Technology, and Packaging
Derek Abbott; Kamran Eshraghian; Charles A. Musca; Dimitris Pavlidis; Neil Weste, Editor(s)

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