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Proceedings Paper

Low-power H.264 video decoder with graceful degradation
Author(s): Arnaud Bourge; Joel Jung
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Paper Abstract

In this paper, we present a novel H.264 video decoder where memory transfers and energy consumption are significantly reduced. A power-friendly solution is indeed required in mobile applications, where autonomy is a key feature. Whereas low-power design is usually regarded as a pure architectural and implementation problem, our solution is based on an algorithmic approach. We first observe that in modern hardware architectures, computational complexity plays a second role in terms of energy dissipation, which is dominated by memory transfers. We thus identify the motion compensation module as the most consuming part of the standard H.264 decoder, due to its numerous memory accesses to the reference frame(s). Through an algorithmic modification that uses concurrent embedded compression techniques and relies on the data structure of the memory, we reduce memory transfers, and hence power dissipation, while maintaining the visual quality. Experimental results prove that the new method is close to the reference H.264 baseline decoder both in terms of objective and subjective measurements. In the meantime, memory transfers have been reduced by 55% in average, implying power savings which lengthen the battery life of the mobile device, increase the reliability of the chip and lower production costs.

Paper Details

Date Published: 18 January 2004
PDF: 12 pages
Proc. SPIE 5308, Visual Communications and Image Processing 2004, (18 January 2004); doi: 10.1117/12.526732
Show Author Affiliations
Arnaud Bourge, Philips Digital Systems Labs. (France)
Joel Jung, Philips Digital Systems Labs. (France)


Published in SPIE Proceedings Vol. 5308:
Visual Communications and Image Processing 2004
Sethuraman Panchanathan; Bhaskaran Vasudev, Editor(s)

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