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Proceedings Paper

Novel kind of DSP design method based on IP core
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Paper Abstract

With the pressure from the design productivity and various special applications, original design method for DSP can no longer keep up with the required speed. A novel design method is needed urgently. Intellectual Property (IP) reusing is a tendency for DSP design, but simple plug-and-play IP cores approaches almost never work. Therefore, appropriate control strategies are needed to connect all the IP cores used and coordinate the whole DSP. This paper presents a new DSP design procedure, which refers to System-on-a-chip, and later introduces a novel control strategy named DWC to implement the DSP based on IP cores. The most important part of this novel control strategy, pipeline control unit (PCU), is given in detail. Because a great number of data hazards occur in most computation-intensive scientific application, a new effective algorithm of checking data hazards is employed in PCU. Following this strategy, the design of a general or special purposed DSP can be finished in shorter time, and the DSP has a potency to improve performance with little modification on basic function units. This DWC strategy has been implement in a 16-bit fixed-pointed DSP successfully.

Paper Details

Date Published: 19 April 2004
PDF: 12 pages
Proc. SPIE 5309, Embedded Processors for Multimedia and Communications, (19 April 2004); doi: 10.1117/12.526060
Show Author Affiliations
Qiaoyan Yu, Zhejiang Univ. (China)
Peng Liu, Zhejiang Univ. (China)
Weidong Wang, Zhejiang Univ. (China)
Xiang Hong, Zhejiang Univ. (China)
Jicheng Chen, Zhejiang Univ. (China)
Jianzhong Yuan, Zhejiang Univ. (China)
Keming Chen, Zhejiang Univ. (China)

Published in SPIE Proceedings Vol. 5309:
Embedded Processors for Multimedia and Communications
Subramania I. Sudharsanan; Michael Bove Jr.; Sethuraman Panchanathan, Editor(s)

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