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Proceedings Paper

Receiverless detection schemes for optical clock distribution
Author(s): Aparna Bhatnagar; Christof Debaes; Hugo Thienpont; David A. B. Miller
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Paper Abstract

This paper summarizes experiments using a modelocked laser to produce a fast-rising, low-jitter electrical signal for clocking CMOS circuits. A simple integrating optical-to-electrical conversion scheme using two photodiodes is used to minimize jitter, area and electrical power consumption. This scheme is called receiver-less because there is no receiver to introduce unwanted skew, jitter and electrical power consumption. Receiver-less optical clock injection to a single CMOS circuit with < 6 ps rms jitter has been demonstrated. To scale the receiver-less concept low capacitance detectors are necessary. Transit-time limited rise times from low capacitance monolithic silicon CMOS photo-detectors have been simulated using 425 nm short pulses. The utility of this 'receiver-less' scheme is examined for larger clock distribution networks and varying photodiode capacitances.

Paper Details

Date Published: 6 July 2004
PDF: 8 pages
Proc. SPIE 5359, Quantum Sensing and Nanophotonic Devices, (6 July 2004); doi: 10.1117/12.518316
Show Author Affiliations
Aparna Bhatnagar, Stanford Univ. (United States)
Christof Debaes, Vrije Univ. Brussel (Belgium)
Hugo Thienpont, Vrije Univ. Brussel (Belgium)
David A. B. Miller, Stanford Univ. (United States)


Published in SPIE Proceedings Vol. 5359:
Quantum Sensing and Nanophotonic Devices
Manijeh Razeghi; Gail J. Brown, Editor(s)

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