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Proceedings Paper

OPC model generation procedure for different reticle vendors
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Paper Abstract

The challenge of delivering acceptable semiconductor products to customers in timely fashion becomes more difficult as design complexity increases. The requirements of current generation designs tax OPC engineers greater than ever before since the readiness of high-quality OPC models can delay new process qualifications or lead to respins, which add to the upward-spiraling costs of new reticle sets, extend time-to-market, and disappoint customers. In their efforts to extend the printability of new designs, OPC engineers generally focus on the data-to-wafer path, ignoring data-to-mask effects almost entirely. However, it is unknown whether reticle makers' disparate processes truly yield comparable reticles, even with identical tools. This approach raises the question of whether a single OPC model is applicable to all reticle vendors. LSI Logic has developed a methodology for quantifying vendor-to-vendor reticle manufacturing differences and adapting OPC models for use at several reticle vendors. This approach allows LSI Logic to easily adapt existing OPC models for use with several reticle vendors and obviates the generation of unnecessary models, allowing OPC engineers to focus their efforts on the most critical layers.

Paper Details

Date Published: 17 December 2003
PDF: 10 pages
Proc. SPIE 5256, 23rd Annual BACUS Symposium on Photomask Technology, (17 December 2003); doi: 10.1117/12.518219
Show Author Affiliations
Andrew M. Jost, LSI Logic Corp. (United States)
Univ. of Oregon (United States)
Nadya Belova, LSI Logic Corp. (United States)
Neal P. Callan, LSI Logic Corp. (United States)


Published in SPIE Proceedings Vol. 5256:
23rd Annual BACUS Symposium on Photomask Technology
Kurt R. Kimmel; Wolfgang Staud, Editor(s)

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