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Proceedings Paper

Analysis and potentialities of backside-illuminated thinned CMOS imagers
Author(s): Cecilia Marques Vatus; Pierre Magnan
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Paper Abstract

CMOS imagers, now considered as a valuable alternative to CCD in many application fields, have their quantum efficiency reduced by optical filtering effects due to complex top layers structure and limited fill factor. Thinning and backside illumination (BI) have been successfully applied to CCD image sensor to improve their quantum efficiency. It can potentially be similarly applied to CMOS imagers in an attempt to allow, both the increase of impinging photons number on the photosensitive area through the suppression of top layers stack filtering, and the use of a maximal fill factor value, the whole backside surface being photosensitive. But, it has to take into account the specific features of CMOS process, mostly the limited EPI thickness in the case of the heavily doped substrate option.

Paper Details

Date Published: 19 February 2004
PDF: 9 pages
Proc. SPIE 5251, Detectors and Associated Signal Processing, (19 February 2004); doi: 10.1117/12.513893
Show Author Affiliations
Cecilia Marques Vatus, SUPAERO (France)
Pierre Magnan, SUPAERO (France)


Published in SPIE Proceedings Vol. 5251:
Detectors and Associated Signal Processing
Jean-Pierre Chatard; Peter N. J. Dennis, Editor(s)

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