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Proceedings Paper

Charge-coupled CMOS and hybrid detector arrays
Author(s): James R. Janesick
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Paper Abstract

Over a decade has passed since complementary metal oxide semiconductor (CMOS) imaging detectors made their move into the charge-coupled device (CCD) arena. Low cost, low power, on-chip system integration, high-speed operation and tolerance to high-energy radiation sources are unique features that make CMOS detectors popular. However, it remains unclear if CMOS arrays can compete with the CCD in high performance applications (e.g., scientific). This paper compares fundamental performance parameters common to both CMOS and CCD imagers, and lists specific SMOS performance deficiencies that prevent the technology from high end use. In this paper we will present custom CMOS pixel designs and related fabrication processes that solve most deficiencies. We will also discuss "hybrid" imaging arrays that marry the advantages of CCD and CMOS producing sensors with superior performance in comparison to CCD and CMOS bulk monolithic sensors. CCD to CMOS, CMOS to CMOS and CMOS SOI hybrids are reviewed.

Paper Details

Date Published: 12 January 2004
PDF: 18 pages
Proc. SPIE 5167, Focal Plane Arrays for Space Telescopes, (12 January 2004); doi: 10.1117/12.511864
Show Author Affiliations
James R. Janesick, Sarnoff Corp. (United States)

Published in SPIE Proceedings Vol. 5167:
Focal Plane Arrays for Space Telescopes
Thomas J. Grycewicz; Craig R. McCreight, Editor(s)

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