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Proceedings Paper

Novel loop output buffer architecture and scheduling for efficient contention resolution in optical packet switching
Author(s): Pengcheng Xiao; Qingji Zeng; Jun Huang; Jimin Liu
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Paper Abstract

A new loop output buffer architecture for optical packet switching is proposed. It is consisted of multiplex FDL loops, which are divided into k stages by k (M+1) x (M+1) switches. Using this architecture, a few FDL loops can provide large optical memories and get good packet-loss performance, and the delay performance can be improved by adding switches and buffer scheduling.

Paper Details

Date Published: 19 August 2003
PDF: 9 pages
Proc. SPIE 5247, Optical Transmission Systems and Equipment for WDM Networking II, (19 August 2003); doi: 10.1117/12.510880
Show Author Affiliations
Pengcheng Xiao, Shanghai Jiaotong Univ. (China)
Qingji Zeng, Shanghai Jiaotong Univ. (China)
Jun Huang, Shanghai Jiaotong Univ. (China)
Jimin Liu, Shanghai Jiaotong Univ. (China)

Published in SPIE Proceedings Vol. 5247:
Optical Transmission Systems and Equipment for WDM Networking II
Benjamin B. Dingel; Werner Weiershausen; Achyut K. Dutta; Ken-Ichi Sato, Editor(s)

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