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Proceedings Paper

Stress-induced voiding in aluminum alloy metallizations
Author(s): Timothy D. Sullivan; James G. Ryan; J. R. Riendeau; Dennis P. Bouldin
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Paper Abstract

Fabrication of microelectronic metal interconnects generates a state of tensile stress in the metal. For constant metal and passivation film thicknesses, the magnitude of stress increases as linewidth decreases until the metal forms internal voids in order to relax. Such voids can grow large enough to sever lines, degrading chip functionality and reliability. For narrow lines, constraints from the passivation layer permit relaxation through void growth to occur only by diffusion. This phenom¬ enon is known as stress migration, by analogy to voiding produced by high electrical current (electromigration). To study the influence of alloy composition and microstructure on diffusion in Al-based interconnects with and without Ti underlayers, interconnects with different amounts of Si, Cu and oxygen were passivated with PECVD SiN, and aged at 150° C for 1000 hr in air. Samples were also electromigration-stressed to highlight possible interactive variables. AI-Cu produces fewer voids and longer electromigration lifetimes than pure Al. High (> 2%) Si appears to promote void formation by rapid grain boundary diffusion and precipitate growth, but does not necessarily decrease electromigration lifetime. Low Si (< 1%) appears to be beneficial for ex¬ tending electromigration lifetime and reducing the total volume of voiding, but causes large void sizes which lead to failure. The effect of oxygen contamination on stress migration is generally detrimental. Ti underlayers are redundant conductors which greatly increase electromigration life, but increase individual void size. A model for thermal dependence of atomic flux, used in con¬ junction with thermal stress hysteresis measurements of metal films, describes a wide range of voiding behavior.

Paper Details

Date Published: 1 December 1991
PDF: 13 pages
Proc. SPIE 1596, Metallization: Performance and Reliability Issues for VLSI and ULSI, (1 December 1991); doi: 10.1117/12.51014
Show Author Affiliations
Timothy D. Sullivan, IBM/General Technology Div. (United States)
James G. Ryan, IBM/General Technology Div. (United States)
J. R. Riendeau, IBM/General Technology Div. (United States)
Dennis P. Bouldin, IBM/General Technology Div. (United States)


Published in SPIE Proceedings Vol. 1596:
Metallization: Performance and Reliability Issues for VLSI and ULSI
Gennady Sh. Gildenblat; Gary P. Schwartz, Editor(s)

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