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Proceedings Paper

Design of a pixel scale optical power meter suitable for incorporation in a multitechnology FPGA
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Paper Abstract

A new multi-technology FPGA (MT-FPGA) architecture has recently been proposed. This new class of programmable hardware allows for the incorporation of a variety of multi-technology blocks like the optical sensor block as described in this paper. Using MT-FPGA technology, a system designer can readily implement any prototype multi-technology system with (1) logic parts in programmable section of MT-FPGA and (2) Multi-technology components by incorporating different multi-technology blocks from standard library. Thus, our new class of multi-technology FPGA will extend the benefits of rapid prototyping, re-configurability and evolvable hardware to multi-technology environments/applications that currently do not benefit from the advantages of programmable hardware. This paper highlights the use of an MT-FPGA chip through the implementation and evaluation of an optical power meter block. This mixed technology block is designed for implementation using a 0.35 micron CMOS process and consists of a p-diffusion to n-well photodetector followed by a wide-swing variable gain differential amplifier and a 4 bit FLASH ADC. The amplifier gain characteristics are adjustable by two analog control signals. One adjusts the gain and the other controls the biasing conditions of the differential amplifier. The last stage of the system is a 4 bit ADC that has a worst case resolution of 0.5 mV.

Paper Details

Date Published: 23 October 2003
PDF: 11 pages
Proc. SPIE 5202, Optical Information Systems, (23 October 2003); doi: 10.1117/12.508558
Show Author Affiliations
Prerna Patel, Univ. of Cincinnati (United States)
Prosenjit Mal, Univ. of Cincinnati (United States)
Fred R Beyette, Univ. of Cincinnati (United States)


Published in SPIE Proceedings Vol. 5202:
Optical Information Systems
Bahram Javidi; Demetri Psaltis, Editor(s)

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