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Proceedings Paper

Low-voltage analog front-end processor design for ISFET-based sensor and H+ sensing applications
Author(s): Wen-Yaw Chung; Chung-Huang Yang; Kang-Chu Peng; M. H. Yeh
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Paper Abstract

This paper presents a modular-based low-voltage analog-front-end processor design in a 0.5mm double-poly double-metal CMOS technology for Ion Sensitive Field Effect Transistor (ISFET)-based sensor and H+ sensing applications. To meet the potentiometric response of the ISFET that is proportional to various H+ concentrations, the constant-voltage and constant current (CVCS) testing configuration has been used. Low-voltage design skills such as bulk-driven input pair, folded-cascode amplifier, bootstrap switch control circuits have been designed and integrated for 1.5V supply and nearly rail-to-rail analog to digital signal processing. Core modules consist of an 8-bit two-step analog-digital converter and bulk-driven pre-amplifiers have been developed in this research. The experimental results show that the proposed circuitry has an acceptable linearity to 0.1 pH-H+ sensing conversions with the buffer solution in the range of pH2 to pH12. The processor has a potential usage in battery-operated and portable healthcare devices and environmental monitoring applications.

Paper Details

Date Published: 1 April 2003
PDF: 10 pages
Proc. SPIE 5102, Independent Component Analyses, Wavelets, and Neural Networks, (1 April 2003); doi: 10.1117/12.508516
Show Author Affiliations
Wen-Yaw Chung, Chung Yuan Christian Univ. (Taiwan)
Chung-Huang Yang, Chung Yuan Christian Univ. (Taiwan)
Van Nung Institute of Technology (Taiwan)
Kang-Chu Peng, Chung Yuan Christian Univ. (Taiwan)
M. H. Yeh, Chung Yuan Christian Univ. (Taiwan)


Published in SPIE Proceedings Vol. 5102:
Independent Component Analyses, Wavelets, and Neural Networks
Anthony J. Bell; Mladen V. Wickerhauser; Harold H. Szu, Editor(s)

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