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Proceedings Paper

Phase defect printability analysis for chromeless phase lithography technology
Author(s): Sungmin Huh; JoHyung Park; Dong-Hoon Chung; Chang-Hwan Kim; In-Kyun Shin; Sung-Woon Choi; Jung-Min Sohn
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Paper Abstract

Chromeless Phase Lithography (CPL) is one of the promising RETs for low K1 optical lithography. However, there are remained issues in CPL mask manufacturing, such as phase defect, which can be generated during quartz dry etching process. In CPL mask technology, the traditional defect printability specification is no longer adequate. This paper investigates to understand the tolerance of the CPL in view of phase defect specification. We studied to find out specifications for phase defect in CPL mask. Three-dimensional topography is used in the phase defect simulation. Based on the simulation results, programmed defect mask is made to evaluate phase defect printability by measuring aerial images with AIMS. Also the inspection sensitivity for quartz phase defect was evaluated with current inspection tool.

Paper Details

Date Published: 28 August 2003
PDF: 9 pages
Proc. SPIE 5130, Photomask and Next-Generation Lithography Mask Technology X, (28 August 2003); doi: 10.1117/12.504395
Show Author Affiliations
Sungmin Huh, Samsung Electronics Co., Ltd. (South Korea)
JoHyung Park, Samsung Electronics Co., Ltd. (South Korea)
Dong-Hoon Chung, Samsung Electronics Co., Ltd. (South Korea)
Chang-Hwan Kim, Samsung Electronics Co., Ltd. (South Korea)
In-Kyun Shin, Samsung Electronics Co., Ltd. (South Korea)
Sung-Woon Choi, Samsung Electronics Co., Ltd. (South Korea)
Jung-Min Sohn, Samsung Electronics Co., Ltd. (South Korea)


Published in SPIE Proceedings Vol. 5130:
Photomask and Next-Generation Lithography Mask Technology X
Hiroyoshi Tanabe, Editor(s)

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