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Proceedings Paper

Novel low-voltage low-power Gb/s transimpedance amplifier architecture
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Paper Abstract

A novel current-mode transimpedance amplifier (TIA) architecture is proposed for optical receivers. This new architecture, based around the use of a uniquely biased common-base current buffer stage, allows stable, DC coupled TIAs to be designed in bipolar or CMOS processes operating from extremely low supply voltages and using very low levels of power. Noise performance is comparable to that of higher power designs that operate from higher supply rails. Simulation results have been obtained for a 47GHz fT SiGe BiCMOS process and also 0.25μm CMOS.

Paper Details

Date Published: 21 April 2003
PDF: 12 pages
Proc. SPIE 5117, VLSI Circuits and Systems, (21 April 2003); doi: 10.1117/12.499081
Show Author Affiliations
Drew Guckenberger, Cornell Univ. (United States)
Kevin Kornegay, Cornell Univ. (United States)

Published in SPIE Proceedings Vol. 5117:
VLSI Circuits and Systems
Jose Fco. Lopez; Juan A. Montiel-Nelson; Dimitris Pavlidis, Editor(s)

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